|
Register Name |
SFR Address |
Module |
Description |
| ADCCON1 | 0xB4 | ADC | ADCcontrol1 |
| ADCCON2 | 0xB5 | ADC | ADCcontrol2 |
| ADCCON3 | 0xB6 | ADC | ADCcontrol3 |
| ADCL | 0xBA | ADC | ADCdata low |
| ADCH | 0xBB | ADC | ADCdata high |
| RNDL | 0xBC | ADC | Randomnumbergenerator datalow |
| RNDH | 0xBD | ADC | Randomnumbergenerator datahigh |
| ENCDI | 0xB1 | AES | Encryption/decryptioninputdata |
| ENCDO | 0xB2 | AES | Encryption/decryptionoutputdata |
| ENCCS | 0xB3 | AES | Encryption/decryptioncontrolandstatus |
| P0 | 0x80 | CPU | Port0. ReadablefromXDATA(0x7080) |
| SP | 0x81 | CPU | Stackpointer |
| DPL0 | 0x82 | CPU | Datapointer0lowbyte |
| DPH0 | 0x83 | CPU | Datapointer0highbyte |
| DPL1 | 0x84 | CPU | Datapointer1lowbyte |
| DPH1 | 0x85 | CPU | Datapointer0highbyte |
| PCON | 0x87 | CPU | Powermodecontrol |
| TCON | 0x88 | CPU | Interruptflags |
| P1 | 0x90 | CPU | Port1. ReadablefromXDATA(0x7090) |
| DPS | 0x92 | CPU | Datapointerselect |
| S0CON | 0x98 | CPU | Interruptflags2 |
| IEN2 | 0x9A | CPU | Interruptenable2 |
| S1CON | 0x9B | CPU | Interruptflags3 |
| P2 | 0xA0 | CPU | Port2. ReadablefromXDATA(0x70A0) |
| IEN0 | 0xA8 | CPU | Interruptenable0 |
| IP0 | 0xA9 | CPU | Interruptpriority0 |
| IEN1 | 0xB8 | CPU | Interruptenable1 |
| IP1 | 0xB9 | CPU | Interruptpriority1 |
| IRCON | 0xC0 | CPU | Interruptflags4 |
| PSW | 0xD0 | CPU | ProgramstatusWord |
| ACC | 0xE0 | CPU | Accumulator |
| IRCON2 | 0xE8 | CPU | Interruptflags5 |
| B | 0xF0 | CPU | Bregister |
| DMAIRQ | 0xD1 | DMA | DMAinterruptflag |
| DMA1CFGL | 0xD2 | DMA | DMAchannel1–4configuration addresslow |
| DMA1CFGH | 0xD3 | DMA | DMAchannel1–4configuration addresshigh |
| DMA0CFGL | 0xD4 | DMA | DMAchannel0configurationaddress low |
| DMA0CFGH | 0xD5 | DMA | DMAchannel0configurationaddress high |
| DMAARM | 0xD6 | DMA | DMAchannelarmed |
| DMAREQ | 0xD7 | DMA | DMAchannelstartrequestandstatus |
| — | 0xAA | — | Reserved |
| — | 0x8E | — | Reserved |
| — | 0x99 | — | Reserved |
| — | 0xB0 | — | Reserved |
| — | 0xB7 | — | Reserved |
| — | 0xC8 | — | Reserved |
| P0IFG | 0x89 | IOC | Port0 interruptstatusflag |
| P1IFG | 0x8A | IOC | Port1 interruptstatusflag |
| P2IFG | 0x8B | IOC | Port2 interruptstatusflag |
| PICTL | 0x8C | IOC | Portpinsinterrupt maskandedge |
| P0IEN | 0xAB | IOC | Port0 interruptmask |
| P1IEN | 0x8D | IOC | Port1 interruptmask |
| P2IEN | 0xAC | IOC | Port2 interruptmask |
| P0INP | 0x8F | IOC | Port0 inputmode |
| PERCFG | 0xF1 | IOC | PeripheralI/Ocontrol |
| APCFG | 0xF2 | IOC | AnalogperipheralI/Oconfiguration |
| P0SEL | 0xF3 | IOC | Port0 functionselect |
| P1SEL | 0xF4 | IOC | Port1 functionselect |
| P2SEL | 0xF5 | IOC | Port2 functionselect |
| P1INP | 0xF6 | IOC | Port1 inputmode |
| P2INP | 0xF7 | IOC | Port2 inputmode |
| P0DIR | 0xFD | IOC | Port0 direction |
| P1DIR | 0xFE | IOC | Port1 direction |
| P2DIR | 0xFF | IOC | Port2 direction |
| PMUX | 0xAE | IOC | Power-downsignalmux |
| MPAGE | 0x93 | MEMORY | Memorypageselect |
| MEMCTR | 0xC7 | MEMORY | Memorysystemcontrol |
| FMAP | 0x9F | MEMORY | Flash-memorybankmapping |
| RFIRQF1 | 0x91 | RF | RFinterruptflagsMSB |
| RFD | 0xD9 | RF | RFdata |
| RFST | 0xE1 | RF | RFcommandstrobe |
| RFIRQF0 | 0xE9 | RF | RFinterruptflagsLSB |
| RFERRF | 0xBF | RF | RFerror interruptflags |
| ST0 | 0x95 | ST | SleepTimer0 |
| ST1 | 0x96 | ST | SleepTimer1 |
| ST2 | 0x97 | ST | SleepTimer2 |
| STLOAD | 0xAD | ST | Sleep-timerloadstatus |
| SLEEPCMD | 0xBE | PMC | Sleep-modecontrolcommand |
| SLEEPSTA | 0x9D | PMC | Sleep-modecontrolstatus |
| CLKCONCMD | 0xC6 | PMC | Clockcontrolcommand |
| CLKCONSTA | 0x9E | PMC | Clockcontrolstatus |
| T1CC0L | 0xDA | Timer1 | Timer1 channel0capture/compare valuelow |
| T1CC0H | 0xDB | Timer1 | Timer1 channel0capture/compare valuehigh |
| T1CC1L | 0xDC | Timer1 | Timer1 channel1capture/compare valuelow |
| T1CC1H | 0xDD | Timer1 | Timer1 channel1capture/compare valuehigh |
| T1CC2L | 0xDE | Timer1 | Timer1 channel2capture/compare valuelow |
| T1CC2H | 0xDF | Timer1 | Timer1 channel2capture/compare valuehigh |
| T1CNTL | 0xE2 | Timer1 | Timer1 counterlow |
| T1CNTH | 0xE3 | Timer1 | Timer1 counterhigh |
| T1CTL | 0xE4 | Timer1 | Timer1 controlandstatus |
| T1CCTL0 | 0xE5 | Timer1 | Timer1 channel0capture/compare control |
| T1CCTL1 | 0xE6 | Timer1 | Timer1 channel1capture/compare control |
| T1CCTL2 | 0xE7 | Timer1 | Timer1 channel2capture/compare control |
| T1STAT | 0xAF | Timer1 | Timer1 status |
| T2CTRL | 0x94 | Timer2 | Timer2 control |
| T2EVTCFG | 0x9C | Timer2 | Timer2 eventconfiguration |
| T2IRQF | 0xA1 | Timer2 | Timer2 interruptflags |
| T2M0 | 0xA2 | Timer2 | Timer2 multiplexedregister0 |
| T2M1 | 0xA3 | Timer2 | Timer2 multiplexedregister1 |
| T2MOVF0 | 0xA4 | Timer2 | Timer2 multiplexedoverflowregister 0 |
| T2MOVF1 | 0xA5 | Timer2 | Timer2 multiplexedoverflowregister 1 |
| T2MOVF2 | 0xA6 | Timer2 | Timer2 multiplexedoverflowregister 2 |
| T2IRQM | 0xA7 | Timer2 | Timer2 interruptmask |
| T2MSEL | 0xC3 | Timer2 | Timer2 multiplexselect |
| T3CNT | 0xCA | Timer3 | Timer3 counter |
| T3CTL | 0xCB | Timer3 | Timer3 control |
| T3CCTL0 | 0xCC | Timer3 | Timer3 channel0compare control |
| T3CC0 | 0xCD | Timer3 | Timer3 channel0compare value |
| T3CCTL1 | 0xCE | Timer3 | Timer3 channel1compare control |
| T3CC1 | 0xCF | Timer3 | Timer3 channel1compare value |
| T4CNT | 0xEA | Timer4 | Timer4 counter |
| T4CTL | 0xEB | Timer4 | Timer4 control |
| T4CCTL0 | 0xEC | Timer4 | Timer4 channel0compare control |
| T4CC0 | 0xED | Timer4 | Timer4 channel0compare value |
| T4CCTL1 | 0xEE | Timer4 | Timer4 channel1compare control |
| T4CC1 | 0xEF | Timer4 | Timer4 channel1compare value |
| TIMIF | 0xD8 | TMINT | Timers1/3/4jointinterruptmask/flags |
| U0CSR | 0x86 | USART0 | USART0 controlandstatus |
| U0DBUF | 0xC1 | USART0 | USART0 receive/transmitdatabuffer |
| U0BAUD | 0xC2 | USART0 | USART0 baud-ratecontrol |
| U0UCR | 0xC4 | USART0 | USART0 UARTcontrol |
| U0GCR | 0xC5 | USART0 | USART0 genericcontrol |
| U1CSR | 0xF8 | USART1 | USART1 controlandstatus |
| U1DBUF | 0xF9 | USART1 | USART1 receive/transmitdatabuffer |
| U1BAUD | 0xFA | USART1 | USART1 baud-ratecontrol |
| U1UCR | 0xFB | USART1 | USART1 UARTcontrol |
| U1GCR | 0xFC | USART1 | USART1 genericcontrol |
| WDCTL | 0xC9 | WDT | WatchdogTimercontrol |
2.4 Instruction Set Summary
The 8051 instruction set is summarized inTable2-3.All mnemonics copyrighted ©Intel Corporation,1980.
The following conventions are used in the instruction set summary:
• Rn–Register R7–R0 of the currently selected register bank
• Direct–8-bit internal data-location address.This can be DATA area(0x00–0x7F) or SFR area (0x80–0xFF).
• @Ri–8-bit internal data location,DATA area(0x00–0xFF) addressed indirectly throughregister R1or R0
• #data–8-bit constanti ncluded ininstruction
• #data16–16-bit constant included ininstruction
• addr16–16-bit destination address.Used by LCALL and LJMP.A branch can be anywhere within the 64-KB CODEmemory space.
• addr11–11-bit destination address.Used by ACALL and AJMP.The branch is within the same2-KB page of program memory ast he first byte of the following instruction.
• rel–Signed(2s-complement) 8-bit offset byte.Used by SJMP and allc onditional jumps.Rangeis–128 to127bytes relative to first byte of the following instruction.
• bit–Direct addressed bit in DATAarea or SFR
The instructions that affect CPU flag settings located in PSW are listed inTable2-4.Note that operations on the PSW register or bits in PSW also affect the flag settings.Also note that the cycle count for many instructions assumes single-cycle access to the memory element being accessed,i.e.,the best-case situation.This is not always the case.Reads from flash may take1–3 cycles,fore xample.
Table 2-3. Instruction Set Summary
| Mnemonic | Description | HexOpcode | Bytes | Cycles |
| ARITHMETICOPERATIONS | ||||
| ADDA,Rn | Addregistertoaccumulator | 28–2F | 1 | 1 |
| ADDA,direct | Adddirectbytetoaccumulator | 25 | 2 | 2 |
| ADD A,@Ri | AddindirectRAMtoaccumulator | 26–27 | 1 | 2 |
| ADDA,#data | Addimmediatedatatoaccumulator | 24 | 2 | 2 |
| ADDCA,Rn | Addregistertoaccumulatorwithcarryflag | 38–3F | 1 | 1 |
| ADDCA,direct | AdddirectbytetoAwithcarryflag | 35 | 2 | 2 |
| ADDC A,@Ri | AddindirectRAMtoAwithcarryflag | 36–37 | 1 | 2 |
| ADDCA,#data | AddimmediatedatatoAwithcarryflag | 34 | 2 | 2 |
| SUBBA,Rn | SubtractregisterfromAwithborrow | 98–9F | 1 | 1 |
| SUBBA,direct | SubtractdirectbytefromAwithborrow | 95 | 2 | 2 |
| SUBB A,@Ri | SubtractindirectRAMfromAwithborrow | 96–97 | 1 | 2 |
| SUBBA,#data | SubtractimmediatedatafromAwithborrow | 94 | 2 | 2 |
| INCA | Incrementaccumulator | 04 | 1 | 1 |
| INCRn | Incrementregister | 08–0F | 1 | 2 |
| INCdirect | Incrementdirectbyte | 05 | 2 | 3 |
| INC @Ri | IncrementindirectRAM | 06–07 | 1 | 3 |
| INCDPTR | Incrementdatapointer | A3 | 1 | 1 |
| DECA | Decrementaccumulator | 14 | 1 | 1 |
| DECRn | Decrementregister | 18–1F | 1 | 2 |
| DECdirect | Decrementdirectbyte | 15 | 2 | 3 |
| DEC @Ri | DecrementindirectRAM | 16–17 | 1 | 3 |
| MULAB | MultiplyAandB | A4 | 1 | 5 |
| DIVA | DivideA byB | 84 | 1 | 5 |
| DAA | Decimaladjustaccumulator | D4 | 1 | 1 |
| LOGICALOPERATIONS | ||||
| ANLA,Rn | ANDregistertoaccumulator | 58–5F | 1 | 1 |
| ANLA,direct | ANDdirectbytetoaccumulator | 55 | 2 | 2 |
| ANL A,@Ri | ANDindirectRAMtoaccumulator | 56–57 | 1 | 2 |
| ANLA,#data | ANDimmediatedatatoaccumulator | 54 | 2 | 2 |
| ANLdirect,A | ANDaccumulatortodirectbyte | 52 | 2 | 3 |
| ANLdirect,#data | ANDimmediatedatatodirectbyte | 53 | 3 | 4 |
| ORLA,Rn | ORregistertoaccumulator | 48–4F | 1 | 1 |
| ORLA,direct | ORdirectbytetoaccumulator | 45 | 2 | 2 |
| ORL A,@Ri | ORindirectRAMtoaccumulator | 46–47 | 1 | 2 |
| ORLA,#data | ORimmediatedatatoaccumulator | 44 | 2 | 2 |
| ORLdirect,A | ORaccumulatortodirectbyte | 42 | 2 | 3 |
| ORLdirect,#data | ORimmediatedatatodirectbyte | 43 | 3 | 4 |
| XRLA,Rn | ExclusiveORregister toaccumulator | 68–6F | 1 | 1 |
| XRLA,direct | ExclusiveORdirectbytetoaccumulator | 65 | 2 | 2 |
| XRL A,@Ri | ExclusiveORindirect RAMto accumulator | 66–67 | 1 | 2 |
| XRLA,#data | ExclusiveORimmediate datatoaccumulator | 64 | 2 | 2 |
| XRLdirect,A | ExclusiveORaccumulator todirectbyte | 62 | 2 | 3 |
| XRLdirect,#data | ExclusiveORimmediate datatodirectbyte | 63 | 3 | 4 |
| CLRA | Clearaccumulator | E4 | 1 | 1 |
| CPLA | Complementaccumulator | F4 | 1 | 1 |
| RLA | Rotateaccumulatorleft | 23 | 1 | 1 |
| RLCA | Rotateaccumulatorleftthroughcarry | 33 | 1 | 1 |
| RRA | Rotateaccumulatorright | 03 | 1 | 1 |
| RRCA | Rotateaccumulatorrightthroughcarry | 13 | 1 | 1 |
| SWAPA | Swapnibbleswithintheaccumulator | C4 | 1 | 1 |
| DATATRANSFERS | ||||
| MOVA,Rn | Moveregistertoaccumulator | E8–EF | 1 | 1 |
| MOVA,direct | Movedirectbytetoaccumulator | E5 | 2 | 2 |
| MOV A,@Ri | MoveindirectRAMtoaccumulator | E6–E7 | 1 | 2 |
| MOVA,#data | Moveimmediatedatatoaccumulator | 74 | 2 | 2 |
| MOVRn,A | Moveaccumulatortoregister | F8–FF | 1 | 2 |
| MOVRn,direct | Movedirectbytetoregister | A8–AF | 2 | 4 |
| MOVRn,#data | Moveimmediatedatatoregister | 78–7F | 2 | 2 |
| MOVdirect,A | Moveaccumulatortodirectbyte | F5 | 2 | 3 |
| MOVdirect,Rn | Moveregistertodirectbyte | 88–8F | 2 | 3 |
| MOVdirect1,direct2 | Movedirectbytetodirectbyte | 85 | 3 | 4 |
| MOV direct,@Ri | MoveindirectRAMtodirectbyte | 86–87 | 2 | 4 |
| MOVdirect,#data | Moveimmediatedatatodirectbyte | 75 | 3 | 3 |
| MOV @Ri,A | MoveaccumulatortoindirectRAM | F6–F7 | 1 | 3 |
| MOV @Ri,direct | Movedirectbytetoindirect RAM | A6–A7 | 2 | 5 |
| MOV @Ri,#data | Moveimmediatedatatoindirect RAM | 76–77 | 2 | 3 |
| MOVDPTR,#data16 | Loaddatapointer witha 16-bitconstant | 90 | 3 | 3 |
| MOVC A,@A+DPTR | MovecodebyterelativetoDPTRtoaccumulator | 93 | 1 | 3 |
| MOVC A,@A+PC | MovecodebyterelativetoPCtoaccumulator | 83 | 1 | 3 |
| MOVX A,@Ri | MoveexternalRAM(8-bitaddress) toA | E2–E3 | 1 | 3 |
| MOVX A,@DPTR | MoveexternalRAM(16-bitaddress) toA | E0 | 1 | 3 |
| MOVX @Ri,A | MoveA toexternalRAM(8-bitaddress) | F2–F3 | 1 | 4 |
| MOVX @DPTR,A | MoveA toexternalRAM(16-bitaddress) | F0 | 1 | 4 |
| PUSHdirect | Pushdirectbyteontostack | C0 | 2 | 4 |
| POPdirect | Popdirectbytefromstack | D0 | 2 | 3 |
| XCHA,Rn | Exchangeregisterwithaccumulator | C8–CF | 1 | 2 |
| XCHA,direct | Exchangedirectbytewithaccumulator | C5 | 2 | 3 |
| XCH A,@Ri | ExchangeindirectRAMwithaccumulator | C6–C7 | 1 | 3 |
| XCHD A,@Ri | Exchangelow-ordernibbleindirect.RAMwithA | D6–D7 | 1 | 3 |
| PROGRAMBRANCHING | ||||
| ACALLaddr11 | Absolutesubroutinecall | xxx11 | 2 | 6 |
| LCALLaddr16 | Longsubroutinecall | 12 | 3 | 6 |
| RET | Returnfromsubroutine | 22 | 1 | 4 |
| RETI | Returnfrominterrupt | 32 | 1 | 4 |
| AJMPaddr11 | Absolutejump | xxx01 | 2 | 3 |
| LJMPaddr16 | Longjump | 02 | 3 | 4 |
| SJMPrel | Shortjump(relative address) | 80 | 2 | 3 |
| JMP @A+DPTR | Jumpindirectrelative tothe DPTR | 73 | 1 | 2 |
| JZrel | Jumpif accumulatoriszero | 60 | 2 | 3 |
| JNZrel | Jumpif accumulatorisnotzero | 70 | 2 | 3 |
| JCrel | Jumpif carryflagisset | 40 | 2 | 3 |
| JNC | Jumpif carryflagisnotset | 50 | 2 | 3 |
| JBbit,rel | Jumpif directbitisset | 20 | 3 | 4 |
| JNBbit,rel | Jumpif directbitisnotset | 30 | 3 | 4 |
| JBCbit,directrel | Jumpif directbitissetandclearbit | 10 | 3 | 4 |
| CJNEA,directrel | ComparedirectbytetoAandjumpifnotequal | B5 | 3 | 4 |
| CJNEA,#datarel | CompareimmediatetoAandjumpifnotequal | B4 | 3 | 4 |
| CJNERn,#datarel | Compareimmediatetoreg.andjumpifnotequal | B8–BF | 3 | 4 |
| CJNE @Ri,#data rel | Compareimmediatetoindirectandjumpifnotequal | B6–B7 | 3 | 4 |
| DJNZRn,rel | Decrementregisterandjumpifnotzero | D8–DF | 1 | 3 |
| DJNZdirect,rel | Decrementdirectbyteandjumpifnotzero | D5 | 3 | 4 |
| NOP | Nooperation | 00 | 1 | 1 |
| BooleanVARIABLEOPERATIONS | ||||
| CLRC | Clearcarryflag | C3 | 1 | 1 |
| CLRbit | Cleardirectbit | C2 | 2 | 3 |
| SETBC | Setcarryflag | D3 | 1 | 1 |
| SETBbit | Setdirectbit | D2 | 2 | 3 |
| CPLC | Complementcarryflag | B3 | 1 | 1 |
| CPLbit | Complementdirectbit | B2 | 2 | 3 |
| ANLC,bit | ANDdirectbittocarryflag | 82 | 2 | 2 |
| ANLC,/bit | ANDcomplementofdirectbittocarry | B0 | 2 | 2 |
| ORLC,bit | ORdirectbittocarryflag | 72 | 2 | 2 |
| ORLC,/bit | ORcomplementofdirectbittocarry | A0 | 2 | 2 |
| MOVC,bit | Movedirectbittocarryflag | A2 | 2 | 2 |
| MOVbit,C | Movecarryflagtodirectbit | 92 | 2 | 3 |
Table 2-4. Instructions That Affect Flag Settings
| Instruction | CY | OV | AC |
| ADD | x | x | x |
| ADDC | x | x | x |
| SUBB | x | x | x |
| MUL | 0 | x | – |
| DIV | 0 | x | – |
| DA | x | – | – |
| RRC | x | – | – |
| RLC | x | – | – |
| SETBC | 1 | – | – |
| CLRC | x | – | – |
| CPLC | x | – | – |
| ANLC,bit | x | – | – |
| ANLC,/bit | x | – | – |
| ORLC,bit | x | – | – |
| ORLC,/bit | x | – | – |
| MOVC,bit | x | – | – |
| CJNE | x | – | – |
Table 2-5. Interrupts Overview
|
Interrupt Number |
Description |
Interrupt Name |
Interrupt Vector |
InterruptMask, CPU |
InterruptFlag,CPU |
| 0 | RFcore errorsituation | RFERR | 0x03 | IEN0.RFERRIE | TCON.RFERRIF(1) |
| 1 | ADCend ofconversion | ADC | 0x0B | IEN0.ADCIE | TCON.ADCIF(1) |
| 2 | USART0 RXcomplete | URX0 | 0x13 | IEN0.URX0IE | TCON.URX0IF(1) |
| 3 | USART1 RXcomplete | URX1 | 0x1B | IEN0.URX1IE | TCON.URX1IF(1) |
| 4 | AESencryption/decryptioncomplete | ENC | 0x23 | IEN0.ENCIE | S0CON.ENCIF |
| 5 | SleepTimercompare | ST | 0x2B | IEN0.STIE | IRCON.STIF |
| 6 | Port-2inputs/USB/I2C | P2INT | 0x33 | IEN2.P2IE | IRCON2.P2IF(2) |
| 7 | USART0 TXcomplete | UTX0 | 0x3B | IEN2.UTX0IE | IRCON2.UTX0IF |
| 8 | DMAtransfercomplete | DMA | 0x43 | IEN1.DMAIE | IRCON.DMAIF |
| 9 | Timer1 (16-bit)capture/compare/overflow | T1 | 0x4B | IEN1.T1IE | IRCON.T1IF(1) (2) |
| 10 | Timer2 | T2 | 0x53 | IEN1.T2IE | IRCON.T2IF(1) (2) |
| 11 | Timer3 (8-bit)capture/compare/overflow | T3 | 0x5B | IEN1.T3IE | IRCON.T3IF(1) (2) |
| 12 | Timer4 (8-bit)capture/compare/overflow | T4 | 0x63 | IEN1.T4IE | IRCON.T4IF(1) (2) |
| 13 | Port0 inputs | P0INT | 0x6B | IEN1.P0IE | IRCON.P0IF(2) |
| 14 | USART1 TXcomplete | UTX1 | 0x73 | IEN2.UTX1IE | IRCON2.UTX1IF |
| 15 | Port1 inputs | P1INT | 0x7B | IEN2.P1IE | IRCON2.P1IF(2) |
| 16 | RFgeneralinterrupts | RF | 0x83 | IEN2.RFIE | S1CON.RFIF(2) |
| 17 | Watchdogoverflowintimermode | WDT | 0x8B | IEN2.WDTIE | IRCON2.WDTIF |
More details: Ti cc254x datasheet
User's Guide-CC253x System-on-Chip Solution for 2.4-GHz IEEE 802.15.4 and ZigBee® Applications
(and CC2540/41 System-on-Chip Solution for 2.4GHz Bluetooth® low energy Applications)